E9008 High Speed Analog Designer |
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Product Highlights
Product DescriptionTypical Photonic/Wireline systems consist of a combination of digital blocks such as Multiplexers and Demultiplexers, and analog blocks such as laser drivers, modulator drivers, travelling wave amplifiers, trans-impedance amplifiers, limiting amplifiers, clock recovery circuits, and so on. E9008 High Speed Analog Designer provides a complete set of simulators to characterize these circuits in the Advanced Design System (ADS) environment.
Frequency-domain circuit characterization models wide bandwidth performance for gain, input/output return loss, group delay, output power, 1 dB compression point, and similar values. Time domain simulation characterizes high speed switching, output Vpp and clock jitter. Time-Domain SimulationsHigh-Frequency SPICE SimulationHigh-Frequency SPICE Simulator is an essential tool for any 10GB/s and 40 GB/s circuit design. Time domain simulation is required for the design of every wireline component to address the challenge of obtaining high data rates with extremely fast rise and fall times. High frequency electrical signals do not have any carrier frequency before optical conversion. Therefore all components require base band circuit characterization using high frequency SPICE simulator. High frequency SPICE is effective for verifying the operation of large circuits with thousands of devices. Convolution SimulationIn addition to lumped component simulation, 10 Gb/s and 40 Gb/s circuit design requires accurate characterization of distributed transmission line models to predict accurate performance at millimeter-wave frequencies. Convolution simulation technology uses accurate frequency domain models or measured S-parameter data to account for skin effect and dispersion. The unique capability of convolution simulator to provide accurate time domain response with frequency domain models makes it the ideal choice for 10 Gb/s and 40 Gb/s circuit design. Frequency-Domain SimulationsS-Parameter SimulationS-parameter simulation provides wide bandwidth, frequency domain analysis for 10 GB/s and 40 GB/s circuits. Circuits are analyzed in terms of gain/loss, input/output return loss, impedance matching, group delay, and other common characteristics. Circuits can be studied and optimized for required performance parameters. Harmonic Balance SimulatorThe Harmonic Balance Simulator calculates the steady state response of non-linear circuits. Harmonic Balance simulation is required for power amplifier and oscillator circuit design. It analyzes and effectively optimizes output power, amplifier compression, phase noise and power added efficiency for most analog circuits used in 10 Gb/s and 40 Gb/s applications. Momentum SimulatorMomentum is an electromagnetic simulation engine based on the method-of-moments technique. Wide bandwidth design for 10 Gb/s and 40 Gb/s applications requires frequency domain EM characterization of circuit layout and IC packages in order to accurately predict performance at millimetric wave frequencies. Model ComposerModel Composer enables the creation of multi-dimensional, parameterized models for passive planar components. The unique and patented modeling method is EM based, thus providing EM accuracy and generality, at circuit simulation speed. Model types include standard interconnect components such as transmission lines and discontinuities on custom substrate. Recent Product EnhancementsProduct enhancements in recent releases include the following:
How To Buy
To request immediate sales assistance - for help choosing the best system; for product configuration and integration details; to request telephone assistance or an on-site demo of the software; or to request a price quotation - click on the following link: Configuration DetailsE8986L High Speed Analog DesignerE8986L High Speed Analog Designer consists of the following:
E8987L High Speed Analog Designer ProE8987L High Speed Analog Designer consists of the following:
E8987L High Speed Analog Designer PremierE8987L High Speed Analog Designer Premier consists of the following:
Product Literature
Technical Articles
Example FilesThe following Advanced Design System project files (.zap files) show various applications of ADS in wireline design. They can be dowloaded and run on ADS 1.5 or ADS 2001. An ADS .deb file containing wireline applications and the papers given at the High Speed Electro-Optical Design Seminar, August - September 2001, are also available for download. Two .zap files are provided for the Mixed Mode S-Parameters project. The file mixed_mode_ADS2001_prj.zap runs only on ADS 2001. All other files are compatible with both revisions of the software. Mixed Mode S-Parameters TemplateThis example describes the schematic set-up for simulating a 2-port differential network with single-ended S-parameters. It also supplies the data display equations and graphs to convert these single-ended S-parameters to a differential S matrix. This example also shows how to simulate differential transmission lines using various methods in ADS. It also shows how to calculate line impedance from these simulations. Download the example file that corresponds to the software revision that you have. The file mixed_mode_ADS2001.zap runs only on ADS 2001. All other files are compatible with both revisions of the software. mixed_mode_ADS2001_prj.zap (.zap file, 4.6 MB) mixed_mode_ADS15_prj.zap (.zap file, 4.7 MB) Multilayer Interconnect Library ExtensionThis example shows how to create multilayer substrate definitions with an arbitrary number of layers up to 255. It also shows how to add these new substrate components to the Tlines-Multilayer palette. MLayer_lib_extend_ADS15.zap (.zap file, 313 KB) A seminar paper is also available:
New TDR Simulations and Data DisplaysThis example shows the use of the TDR simulation instruments for time domain and frequency domain simulation of a circuit. It also describes new functions that allow you to display the impedance versus time from a time domain simulation, and the reflection coefficient and impedance versus time for frequency domain TDR simulations. TDRmeas_vs_model_NEW.zap (.zap file, 184 KB) Eye Closure CalculationsThe eye function in ADS is limited to simply displaying an eye pattern for time domain data. This example presents new functions that allow the calculation of eye parameters such as eye amplitude, eye height, and eye closure to perform a quantitative analysis of eye patterns. Eye_closure.zap (.zap file, 147 KB) IBIS Model Implementations in ADSThis example is the ADS implementation of IBIS models following the example given in an MDS example. This shows the methodology for creating IBIS models in ADS and using them in a simulation to show crosstalk in a PCB application. Seminar Files and Papers: High Speed Electro-Optical Design Seminar, August - September 2001Advanced Design System (ADS) .deb files for Windows and UNIX installations are available in the Free Add-on Releases area of the Technical Support area of this web site: The file is called Wireline Applications and provides the collection of various examples such as Multiplexer, De-Multiplexer, Laser Driver, Transimpedance Amplifier, VCSEL and noise simulations utilities demonstrating high-speed circuit design using Advanced Design System. High Speed Electro-Optical Design Seminar, August - September 2001Papers from the High Speed Electro-Optical Design Seminar, August - September 2001, are also available. Click on any of the following links.
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