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Agilent EEsof EDA Applications: Phase-Locked Loops

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Phase-Locked Loops

Designers of phase-locked loops (PLL) can use various tools in Advanced Design System (ADS) at both the circuit level and the system level. Circuit Envelope simulation can model transient responses. Harmonic Balance simulation shows loop bandwidth performance.

Additional design support is provided by a growing number of examples and training classes, and by Agilent EEsof EDA technical support.

Customer Comment ...
"Micro Linear used ADS to behaviorally model a direct FSK modulator at 5.8GHz. Since the modulator was based on a fractional-N synthesizer with a two-port VCO, we were concerned about the interaction between the modulation signal and loop filter of the fractional-N synthesizer.

ADS gave us the capability to run mixed signal simulations that involved both analog blocks, such as the loop filter, and digital blocks such as the delta-sigma modulator and Gaussian pulse-shaping filter. These simulations were crucial in optimizing important design parameters such as PLL configuration and loop bandwidth.

Moreover, the simulation helped us to gain much better insight into the influence of the DSM architecture on the quantization noise of the synthesizer. After verifying our digital blocks at the algorithm level using Ptolemy, we used the HDL co-simulation capability of the ADS to validate our Verilog codes for the DSM and the pulse-shaping filter. The chip was built in a SiGe BiCMOS process and we were impressed by how closely lab results matched ADS simulation."

- Shayan Farahvash, RFIC Systems Architect, Micro Linear Corporation, San Jose, California, USA


Click on any of the links on this page to learn more about examples and products using EDA tools from Agilent EEsof EDA.

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 Products
Agilent EEsof EDA products that support phase-locked loop design include the following:
Advanced Design System (ADS) Bundled Suites
• Microwave Circuit Designer
Individual ADS Modules
• Design Environment
• Data Display
ADS Simulators
• Linear
• Harmonic Balance
• Ptolemy
 DesignGuides
DesignGuides for Advanced Design System guide you through complex multi-step design flows and automate the setup, simulation, and data display of complete designs.
DesignGuides Overview
Product Description Data Sheet (PDF, 2.0 MB)
Phase Locked Loop DesignGuide
Product Description
DesignGuide Developer Studio
Product Description
 Contact Agilent EEsof EDA
To contact an Agilent Technologies representative by telephone for help with Product Selection and Product Purchase, click on the following link:
• Sales
To send an e-mail message to Agilent EEsof EDA, click on the following link:
• Send E-mail to Agilent EEsof EDA
 
 Examples
Project files in the Examples directory of Advanced Design System are described in the online manual and listed in the Examples Documentation.
Project files that show phase-locked loop design include the following:
Charge-Pump Phase/Frequency
Fifth-Order Phase-Locked Loop
Fraction-N PLL
Open and Closed Loop PLL Simulation
Phase Noise Simulation
Phase Noise Simulations Using Small Signal Models
PLL Simulations Using Circuit Envelope

New Examples
PLL Modeling Seminar Example
Phase/Frequency Detector with Deadzone
Fractional-Divider Phase Locked Loop with Sigma-Delta Modulator

Support Examples
Support examples can be found in the
Agilent EEsof Knowledge Center.

 Training Classes
• Overview: Customer Education
• Advanced Design System Fundamentals
 Seminar Presentations
• Simulating Phase Locked Loops Using ADS, 42-slide seminar presentation. 26 August 2006.
 Technical Articles and Links
• Russ Kramer, Agilent EEsof EDA, Yi Fang and Wei Zhang, M/A-COM, Tyco Electronics Good behavioral model simulation: key to predicting first-order PLL synthesizer performance (Part 1 of 2), Planet Analog, 23 January 2008. Current Issue: Planet Analog.

• Russ Kramer, Agilent EEsof EDA, Yi Fang and Wei Zhang, M/A-COM, Tyco Electronics Good behavioral model simulation: key to predicting first-order PLL synthesizer performance (Part 2 of 2), Planet Analog, 23 January 2008. Current Issue: Planet Analog.

• Andy Howard, An integrated EDA-tools flow improves designers' productivity, EDN: Electronic Design News, 30 May 2002. PDF Version Current Issue: EDN: Electronic Design News.

• Brian L. Berg and David C. Farden, Designing Power- and Area-Efficient Multistage FIR Decimators with Economical Low-Order Filters, ChipCenter, December 2001. PDF Version (64 KB). Current Issue: ChipCenter.

• Andy Howard, Delta-Sigma Modulator With Dithered Divide Ratio (PDF, 288 KB). Originally published as: Simulating a Phase-Locked Loop Using a Sigma-Delta Modulator to Attain Nearly Arbitrary Frequency Resolution Without Spurs, ChipCenter, 18 October 2001. Current Issue: eeProductCenter.

• How-Siang Yap, Designing to Digital Wireless Specifications Using Circuit Envelope Simulation, Applied Microwave & Wireless, June 1998. Current Issue: Applied Microwave & Wireless.